- 191719 - Electrical Design and Analysis Engineer 4
- 12 months
- Chipton-Ross is seeking 5 Electrical Design and Analysis Engineer 4s located in Hazelwood, MO.
Leads analysis of customer and system requirements and development of architectural approaches and detailed specifications for various electronic products. Leads development of high-level and detailed designs consistent with requirements and specifications. Leads reviews of testing and analysis activity to assure compliance to requirements. Identifies, tracks and statuses technical performance measures to measure progress and ensure compliance with requirements. Leads activities in support of Supplier Management with make/buy recommendations and other technical services. Coordinates engineering support throughout the lifecycle of the product. Plans research projects to develop concepts for future product designs to meet projected requirements. Works under minimal direction.
Leads activities to develop, document and maintain complex architectures, requirements, algorithms, interfaces and designs for Xilinx FPGA based firmware systems. Leads development of code and integration of complex firmware components into a fully functional system. Develops firmware verification plans, test procedures and test environments, executing the test procedures and documenting test results to ensure firmware system requirements are met. Provides technical leadership for firmware projects. Leads development, selection, tailoring and deployment of processes, tools and metrics. Leads firmware research and development projects. Serves as a subject matter expert for firmware domains, system-specific issues, processes and regulations. Tracks and evaluates firmware team performance to ensure product and process conformance to project plans and industry standards. Trains and mentors others. Works under consultative direction.
Basic Qualifications (Required Skills/Experience)
• 6+ years’ of experience in Digital FPGA verification, with design experience
• Verification work experience using Verilog or SystemVerilog, with UVM methodology
Preferred Qualifications (Desired Skills/Experience)
• Experience developing Universal Verification Methodology (UVM) compatible testbench components such as predictor, monitor, scorebard and Universal Verification Component (UVC) agents
• Experience writing UVM virtual sequences and UVC sequences
• Experience writing SystemVerilog assertion (SVA), and Covergroup/Coverpoints
• Experience architecting and developing verification methods to verify FPGA level requirements
• Experience writing simulation plan and generating simulation artifacts
• Experience in DO-254 verification process
• Experience in code coverage analysis
• Experience using Linux or Unix terminal commands
• Experience with scripting language like Perl and shell script
• Experience using Revision Control Systems: GIT, BitBucket
• Experience in running and managing regression, as well as providing regression result traceability to requirements
Accredited Bachelors Degree or higher in Engineering, Mathematics or Physics
8:00 AM - 4:00 PM
Employment will be contingent on clearing a drug screen and background check. Both must clear prior to start date.
6926 Rivers Ave
North Charleston, SC 29406
Phone: (843) 554-5800 x181 or (800) 927-9318 x181
Candidates responding to this posting must currently possess the eligibility to work in the United States. No third parties please.
Employment will be contingent on candidate clearing pre-employment drug screen and background check.
Chipton-Ross provides equal employment opportunities to all employees and applicants for employment without regard to race, color, creed, religion, national origin, sex (including pregnancy), age, disability, sexual orientation, gender identity and/or expression, protected veteran status, genetic information, or any other characteristic protected by Federal, State or local law. This policy governs all areas of employment at Chipton-Ross, including recruiting, hiring, training, assignment, promotions, compensation, benefits, discipline, and terminations.